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Silicon Labs /SiM3_NRND /SIM3L166_C /PBSTD_0 /PBPGEN

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Interpret as PBPGEN

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https://regviz.com/r/Silicon Labs/SiM3_NRND/SIM3L166_C/PBSTD_0/PBPGEN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PBPGEN

Description

Pulse Generator Pin Enable

Fields

PBPGEN

Pulse Generator Pin Enable.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data